Finite State Machines in Hardware: Theory and Design (with VHDL and SystemVerilog)

Modern, complex digital systems invariably include hardware-implemented finite state machines. The correct design of such parts is an important for attaining proper system performance. This book offers detailed, comprehensive coverage of the theory and design for any category of hardware-implemented finite state machines. It describes an important design problems that lead to improper or far from optimal implementation and provides examples of finite state machines developed in both VHDL and SystemVerilog (the successor of Verilog) hardware description languages.

Important features include: extensive review of design practices for sequential digital circuits; a new division of all state machines into three hardware-based categories, encompassing all conceivable situations, with a large number of practical examples provided in all three categories; the presentation of complete designs, with detailed VHDL and SystemVerilog codes, comments, and simulation results, all tested in FPGA devices; and exercise examples, all of which will also be synthesized, simulated, and physically implemented in FPGA boards. Additional material is to be had on the book’s Website.

Designing a state machine in hardware is more complex than designing it in software. Despite the fact that interest in hardware for finite state machines has grown dramatically in up to date years, there is no comprehensive remedy of the subject. This book offers the most detailed coverage of finite state machines to be had. It’ll be essential for industrial designers of digital systems and for students of electrical engineering and computer science.

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